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Shenzhen Sai Collie Technology Co., Ltd.
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LPC54114J256BD64QL MCU Chip Floating Point Dual Processor Cores Memory Protection

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LPC54114J256BD64QL MCU Chip Floating Point Dual Processor Cores Memory Protection

Brand Name : NXP

Model Number : LPC54114J256BD64QL

Place of Origin : original

MOQ : 1

Price : Negotiable

Payment Terms : L/C, D/A, D/P, T/T, Western Union, MoneyGram

Supply Ability : 999999

Delivery Time : 1 - 3 days

Packaging Details : standard

Mounting Type : Surface Mount

Speed : 100MHz

Program Memory Size : 256KB (256K x 8)

Program Memory Type : FLASH

RAM Size : 192K x 8

Operating Temperature : -40°C ~ 105°C (TA)

PN : LPC54114J256BD64QL

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LPC54114J256BD64QL MCU Microcontroller
Unit 64-LQFP Package Floating Point Dual Processor Cores Memory Protection

Core Processor
ARM® Cortex®-M4/M0+
Core Size
Speed
100MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number of I/O
50
Program Memory Size
Program Memory Type
FLASH
EEPROM Size
-
RAM Size
192K x 8
Voltage - Supply (Vcc/Vdd)
1.62V ~ 3.6V
Data Converters
A/D 12x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C (TA)
Mounting Type
Surface Mount
Package / Case
64-LQFP
Supplier Device Package
64-LQFP (10x10)
Base Product Number

The LPC54114J256BD64QL, LPC5411x are ARM Cortex-M4 based microcontrollers for embedded applications. These devices include an ARM Cortex-M0+ coprocessor, up to 192 KB of on-chip SRAM, up to 256 KB on-chip flash, full-speed USB device interface with Crystal-less operation, a DMIC subsystem with PDM microphone interface and I2S, five general-purpose timers, one SCTimer/PWM, one RTC/alarm timer, one 24-bit Multi-Rate Timer (MRT), a Windowed Watchdog Timer (WWDT), eight flexible serial communication peripherals (each of which can be a USART, SPI, or I2C interface), and one 12-bit 5.0 Msamples/sec ADC, and a temperature sensor.

The LPC54114J256BD64QL,ARM Cortex-M4 is a 32-bit core that offers system enhancements such as low power consumption, enhanced debug features, and a high level of support block integration. The ARM Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals, and includes an internal prefetch unit that supports speculative branching. The ARM Cortex-M4 supports single-cycle digital signal processing and SIMD instructions. A hardware floating-point unit is integrated in the core.

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LPC54114J256BD64QL MCU Chip Floating Point Dual Processor Cores Memory Protection


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